The next trend of SDVs is hyper-convergence, or centralization, of the E/E architecture. This means merging several functions of the vehicle into single ECUs, or even single system-on-chips. Those approaches seem to bring many benefits, from having a cloud replica of the car, being HW-agnostic, to wiring efficiency and time-to-market, but this also comes with a lot of security and safety challenges. This presentation will dig into those specific challenges, and compare different solutions that will be available in the market in the next decade, highlighting their weaknesses and advantages. Finally, let’s see what technological alignments areneeded in the ecosystem for those solutions to be beneficial to everyone, without compromising safety of road users.
The world of E/E architectures is once more at a crossroads. With an increasing demand to push software-driven features into the volume segment, and a fierce price competition it is up to the E/E architecture to help strike the balance between cost-down and innovativeness. In this talk we present a revised, technology-driven view on technology and refactoring needs for emerging and future vehicle architectures
Evolution of automotive compute to meet dynamic SDV demands
Higher levels of automation in road transport mobility are a true moonshot. Very few OEMs have so far successfully obtained road approval for their Level 3 automated driving system, BMW being one of them. AI already now is a major technological driving force behind automated driving and will continue to be. We will highlight current frontiers of AI development in safety relevant systems and explore, how expected evolution of the technology will influence the road ahead for automated driving functions. Growth in sensor data volume and machine learning compute demand is fuelling a race to ever more potent embedded systems. Just brute-forcing hardware will not do.
In this presentation, we explore critical advancements in automotive technology, focusing on the transition to software-defined vehicles (SDVs). Our discussion covers three key areas:
Development of automated driving software requires testing on embedded hardware platforms using large amounts of test data. Furthermore, multiple hardware platforms may need to be targeted simultaneously having different neural processing units (NPU) and other features. An accelerated testing flow is required that allows developers to test features on multiple platforms while supporting CI/CD. We present a multi-stage testing flow that uses software-in-loop (SiL) testing and takes advantage of massive cloud-based acceleration resources running multiple virtual platforms with large amount of test data. We show that accelerated functional models of the NPU are invaluable for enabling SiL and reducing costs.
The presentation will show the current challenges for AI in the area of safety-critical scenarios for real-time automation of cars. In Detail use cases like Freespace or Near-field Automotive Perception will be investigated and example applications will be given including cutting edge sensor technologies. A methodology is presented on how AI should be certified using operational domain definition, scenario based analytics, requirement traceability throughout neural networks. These principles are generically applicable in all fields of automation (robots, cars). The presentation will open eyes for a new certification of AI using large scale data models and motion based functions towards AI ASIL certification.
Using chiplets in automotive computing paves the way for more scalable, cost-effective, high-performance systems. In this talk, Dr. Sousa will explore the significant role chiplets play in automotive applications, emphasizing the importance of standards such as the UCIe™ (Universal Chiplet Interconnect Express™). He will conclude his presentation with a reference architecture and results from a demonstration developed in a highly advanced technology node using Cadence tools. Join him in discovering how chiplets are driving the future of automotive technology.